kqcircuits.util.netlist_extraction¶
- kqcircuits.util.netlist_extraction.export_cell_netlist(cell, filename, pcell=None)[source]¶
Exports netlist into filename in JSON
The file will have four sections:
{"nets": {...}, "subcircuits": {...}, "circuits": {...}, "chip": {...}}
KLayout’s terminology differs from the one used in typical EDA tools where we have components (resistors, capacitors, etc.), pins (the endpoints of components) and nets (i.e. wires between pins). Components are PCell instances, a.k.a. cells, these are called subcircuits in the netlist file.
The main conceptual difference is that waveguides, that would be analogous to wires, are also treated as components. Consequently, a net in the
nets
section usually contains exactly two overlapping pins that belong to two different components each identified by a uniquesubcircuit_id
. One of these is almost always a waveguide. Unconnected pins are not shown except for Launchers.The
subcircuits
section is a dictionary of the used cells:<subcircuit_id>: {"cell_name": "...", "subcircuit_location": [<x>, <y>]}
. Wherecell_name
is the name of the used Element optionally appended with$<n>
if there are more than one Elements of the same type. Different instances of the same cell will have differentsubcircuit_id
but identicalcell_name
.The
circuits
section mapscell_name
to a dictionary of the named Element’s parameters.If the Cell object is a Chip, the
chip
section contains bounding boxes of each face in the chip.- Parameters
cell – pya Cell object
filename – absolute path as convertible to string
pcell – pya PCell object. If None, an attempt is made to treat cell as pcell
- kqcircuits.util.netlist_extraction.export_netlist(circuit, filename, internal_layout, original_layout, cell_mapping, pcell=None)[source]¶
Exports circuit into filename in JSON
- Parameters
circuit – pya Circuit object
filename – absolute path as convertible to string
internal_layout – pya layout object where the netlist cells are registered
original_layout – pya Layout object where the original cells and pcells are registered
cell_mapping – CellMapping object as given by pya LayoutToNetlist object
pcell – pya PCell object from which circuit was extracted, if available
- kqcircuits.util.netlist_extraction.extract_nets(net)[source]¶
Extract dictionary for net for JSON export
- kqcircuits.util.netlist_extraction.extract_circuits(cell_mapping, internal_cell, layout)[source]¶
Extract dictionary for circuit for JSON export
